Job Description

Minimum qualifications: + Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience. + 8 years of industry experience with leading mobile SoC PKG power integrity and achieved mass production. + Experience with electromagnetic, transmission line, and circuit design. + Experience with power integrity frequency domain and time domain modeling, simulation, and correlation. Preferred qualifications: + Master's degree or PhD in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience. + 12 years of experience with owning multiple generations of mobile SoC PKG PI. + Experience with EDA tools such as Ansys HFSS, Q3D, SiWave; Cadence PowerSI, Clarity, PowerDC, Allegro, APD, Spectre; Keysight ADS, Synopsys Hspice and PDN design, modeling, optimization, simulation, lab measurement correlation with lab measurement, validation and correlation on package, die and PCB level. + Knowledge of on-chip power analysis flow (e.g. PTPX, Redhawk, Voltus) and SoC physical design (e.g. floor plan) with high speed oscilloscopes, TDR and VNA. Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. The US base salary range for this full-time position is $183,000-$271,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google ( . + Participate in package design feasibility study, technology selection, design optimization (stackup, ballmap, decaps, and layout), model extraction, frequency and time domain power simulation. + Work with cross-functional teams to design and optimize the system boards. + Work with the power supply team to generate and qualify the Power Management IC (PMIC) models. + Model extraction, frequency domain and time domain simulation for core power . + Power integrity methodology development. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also and If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form:

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Full time, Worldwide,

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